View source for 18314862. LOGIC CIRCUITS USING VERTICAL TRANSISTORS WITH BACKSIDE SOURCE OR DRAIN REGIONS simplified abstract (Intel Corporation)

=LOGIC CIRCUITS USING VERTICAL TRANSISTORS WITH BACKSIDE SOURCE OR DRAIN REGIONS=


==Organization Name==

[[:Category:Intel Corporation|Intel Corporation]]


[[Category:Intel Corporation]]

==Inventor(s)==

[[:Category:Sagar Suthram of Portland OR (US)|Sagar Suthram of Portland OR (US)]][[Category:Sagar Suthram of Portland OR (US)]]

[[:Category:Tahir Ghani of Portland OR (US)|Tahir Ghani of Portland OR (US)]][[Category:Tahir Ghani of Portland OR (US)]]

[[:Category:Anand S. Murthy of Portland OR (US)|Anand S. Murthy of Portland OR (US)]][[Category:Anand S. Murthy of Portland OR (US)]]

[[:Category:Wilfred Gomes of Portland OR (US)|Wilfred Gomes of Portland OR (US)]][[Category:Wilfred Gomes of Portland OR (US)]]

[[:Category:Pushkar Sharad Ranade of San Jose CA (US)|Pushkar Sharad Ranade of San Jose CA (US)]][[Category:Pushkar Sharad Ranade of San Jose CA (US)]]

[[:Category:Abhishek A. Sharma of Portland OR (US)|Abhishek A. Sharma of Portland OR (US)]][[Category:Abhishek A. Sharma of Portland OR (US)]]

[[:Category:Rishabh Mehandru of Portland OR (US)|Rishabh Mehandru of Portland OR (US)]][[Category:Rishabh Mehandru of Portland OR (US)]]

==LOGIC CIRCUITS USING VERTICAL TRANSISTORS WITH BACKSIDE SOURCE OR DRAIN REGIONS - A simplified explanation of the abstract==


This abstract first appeared for US patent application 18314862 titled 'LOGIC CIRCUITS USING VERTICAL TRANSISTORS WITH BACKSIDE SOURCE OR DRAIN REGIONS

==Simplified Explanation==

==Abstract==
IC devices with logic circuits using vertical transistors with backside source or drain (S/D) regions are disclosed. The vertical transistor includes an elongated structure of semiconductor material extending between a first side and an opposing second side of a substrate. The first S/D region is provided at the first side of the substrate, while the second S/D region is provided at the second side, with the channel region of the transistor being the portion of the elongated structure between the first and second S/D regions. This technology aims to increase transistor densities on semiconductor chips and decrease short-channel effects associated with continuous scaling of IC components.

==Bullet Points==
* IC devices with logic circuits using vertical transistors with backside S/D regions are disclosed.
* The vertical transistor includes an elongated structure of semiconductor material extending between a first side and an opposing second side of a substrate.
* The first S/D region is provided at the first side of the substrate, while the second S/D region is provided at the second side.
* The channel region of the transistor is the portion of the elongated structure between the first and second S/D regions.
* This technology aims to increase transistor densities on semiconductor chips.
* This technology aims to decrease short-channel effects associated with continuous scaling of IC components.

==Potential Applications==
* Integrated circuit (IC) devices
* Logic circuits
* Semiconductor chips

==Problems Solved==
* Limited real estate on semiconductor chips for increasing transistor densities
* Short-channel effects associated with continuous scaling of IC components

==Benefits==
* Increased transistor densities on semiconductor chips
* Decreased short-channel effects


==Original Abstract Submitted==

IC devices with logic circuits using vertical transistors with backside source or drain (S/D) regions, and related assemblies and methods, are disclosed herein. An example vertical transistor includes an elongated structure (e.g., a nanoribbon) of one or more semiconductor materials extending between a first side (e.g., a back side) and an opposing second side (e.g., a front side) of a substrate. The first S/D region of the transistor may be provided at the first side of the substrate, while the second S/D region of the transistor may be provided at the second side, with the channel region of the transistor being the portion of the elongated structure between the first and second S/D regions. Implementing various logic circuits using vertical transistors with backside S/D regions may provide a promising way to increasing densities of transistors on the limited real estate of semiconductor chips and/or decreasing short-channel effects associated with continuous scaling of IC components.



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