View source for 18253174. Controlling Memory Frequency Based on Transaction Queue Occupancy simplified abstract (GOOGLE LLC)

=Controlling Memory Frequency Based on Transaction Queue Occupancy=


==Organization Name==

[[:Category:GOOGLE LLC|GOOGLE LLC]]


[[Category:GOOGLE LLC]]

==Inventor(s)==

[[:Category:Derek James Basehore of Mountain View CA (US)|Derek James Basehore of Mountain View CA (US)]][[Category:Derek James Basehore of Mountain View CA (US)]]

[[:Category:Sonny Rao of San Francisco CA (US)|Sonny Rao of San Francisco CA (US)]][[Category:Sonny Rao of San Francisco CA (US)]]

==Controlling Memory Frequency Based on Transaction Queue Occupancy - A simplified explanation of the abstract==


This abstract first appeared for US patent application 18253174 titled 'Controlling Memory Frequency Based on Transaction Queue Occupancy

==Simplified Explanation==

The patent application describes techniques and apparatuses that use transaction queue lengths to adjust the clock frequency controlling memory access in an electronic device.

* Detecting when a transaction queue threshold is exceeded.
* Initiating a counter to measure the duration of the violation.
* Determining if the transaction queue threshold continues to be violated for the measured duration.
* Altering the clock frequency that controls memory access in response to the violation.

==Potential Applications==
This technology can be applied in various electronic devices that utilize memory access, such as:

* Computers and servers.
* Mobile devices (smartphones, tablets).
* Internet of Things (IoT) devices.
* Embedded systems.

==Problems Solved==
The technology addresses the following problems:

* Transaction queue congestion leading to performance degradation.
* Inefficient memory access due to high queue lengths.
* Bottlenecks in electronic devices caused by memory access delays.

==Benefits==
The use of transaction queue lengths to adjust clock frequency offers several benefits:

* Improved performance by dynamically adapting the clock frequency based on queue length.
* Efficient memory access management, reducing congestion and delays.
* Enhanced overall system responsiveness and throughput.
* Optimal utilization of memory resources in electronic devices.


==Original Abstract Submitted==

Techniques and apparatuses are described that use transaction queue lengths to alter a clock frequency that controls access to a memory of an electronic device. Techniques include detecting that a transaction queue threshold has been violated, initiating a counter to measure a time duration, determining that the transaction queue threshold continues to be violated for the time duration and, in response, altering the clock frequency that controls access to the memory of the electronic device.



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