View source for 18105341. REGISTER CLOCK DRIVER, OPERATING METHOD OF REGISTER CLOCK DRIVER, AND MEMORY MODULE INCLUDING REGISTER CLOCK DRIVER AND PLURALITY OF MEMORY DEVICES simplified abstract (Samsung Electronics Co., Ltd.)

=REGISTER CLOCK DRIVER, OPERATING METHOD OF REGISTER CLOCK DRIVER, AND MEMORY MODULE INCLUDING REGISTER CLOCK DRIVER AND PLURALITY OF MEMORY DEVICES=


==Organization Name==

[[:Category:Samsung Electronics Co., Ltd.|Samsung Electronics Co., Ltd.]]


[[Category:Samsung Electronics Co., Ltd.]]

==Inventor(s)==

[[:Category:Bumsoo Lee of Suwon-si (KR)|Bumsoo Lee of Suwon-si (KR)]][[Category:Bumsoo Lee of Suwon-si (KR)]]

==REGISTER CLOCK DRIVER, OPERATING METHOD OF REGISTER CLOCK DRIVER, AND MEMORY MODULE INCLUDING REGISTER CLOCK DRIVER AND PLURALITY OF MEMORY DEVICES - A simplified explanation of the abstract==


This abstract first appeared for US patent application 18105341 titled 'REGISTER CLOCK DRIVER, OPERATING METHOD OF REGISTER CLOCK DRIVER, AND MEMORY MODULE INCLUDING REGISTER CLOCK DRIVER AND PLURALITY OF MEMORY DEVICES

==Simplified Explanation==

The disclosed patent application is for a register clock driver that includes an operating circuit and a training circuit. The operating circuit buffers a command and an address received from an external memory controller. The training circuit performs a first training operation and a second training operation during an initialization operation.

* The first training operation involves selecting one of multiple reference clock signals as a first training clock signal. This clock signal is used to sample the output signals from the operating circuit.
* The second training operation involves selecting a second training clock signal for sampling the output signals. The selection is done through phase adjustment based on the first training clock signal.

Potential applications of this technology:
* This register clock driver can be used in various electronic devices that require precise clock synchronization, such as computer systems, communication devices, and data storage systems.
* It can be applied in memory controllers, where accurate timing is crucial for efficient data transfer and processing.

Problems solved by this technology:
* The register clock driver solves the problem of clock signal synchronization by providing a training circuit that adjusts the phase of the training clock signal based on the reference clock signal.
* It ensures accurate sampling of output signals from the operating circuit, improving the reliability and performance of the overall system.

Benefits of this technology:
* The register clock driver improves the accuracy and stability of clock synchronization, leading to better overall system performance.
* It simplifies the initialization process by automating the training operations, reducing the need for manual adjustments.
* The technology enhances the efficiency of data transfer and processing in memory controllers, resulting in faster and more reliable operation.


==Original Abstract Submitted==

Disclosed is a register clock driver which includes an operating circuit that buffers a command and an address received from an external memory controller, and a training circuit that performs a first training operation and a second training operation in an initialization operation. In the first training operation, one of a plurality of reference clock signals is selected as a first training clock signal for sampling output signals output from the operating circuit. In the second training operation, a second training clock signal for sampling the output signals is selected through phase adjustment based on the first training clock signal.



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