View source for 17981734. Dual Magnetic Tunnel Junction Devices For Magnetic Random Access Memory (Mram) simplified abstract (TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.)

=Dual Magnetic Tunnel Junction Devices For Magnetic Random Access Memory (Mram)=


==Organization Name==

[[:Category:TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.|TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.]]


[[Category:TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.]]

==Inventor(s)==

[[:Category:Vignesh Sundar of Sunnyvale CA (US)|Vignesh Sundar of Sunnyvale CA (US)]][[Category:Vignesh Sundar of Sunnyvale CA (US)]]

[[:Category:Yu-Jen Wang of San Jose CA (US)|Yu-Jen Wang of San Jose CA (US)]][[Category:Yu-Jen Wang of San Jose CA (US)]]

[[:Category:Luc Thomas of San Jose CA (US)|Luc Thomas of San Jose CA (US)]][[Category:Luc Thomas of San Jose CA (US)]]

[[:Category:Guenole Jan of San Jose CA (US)|Guenole Jan of San Jose CA (US)]][[Category:Guenole Jan of San Jose CA (US)]]

==Dual Magnetic Tunnel Junction Devices For Magnetic Random Access Memory (Mram) - A simplified explanation of the abstract==


This abstract first appeared for US patent application 17981734 titled 'Dual Magnetic Tunnel Junction Devices For Magnetic Random Access Memory (Mram)

==Simplified Explanation==

The abstract describes a dual magnetic tunnel junction (DMTJ) configuration for improved magnetoresistive ratio and lower critical switching current. The DMTJ consists of a first tunnel barrier (TB1) with lower resistance×area (RA) product than a second tunnel barrier (TB2), and antiparallel aligned magnetizations of the pinned layers (PL1 and PL2). The condition RA1<RA2 is achieved by adjusting the thickness, oxidation state, or introducing dopants in TB1, or by using a metallic spacer instead of TB1.

* A dual magnetic tunnel junction (DMTJ) configuration is disclosed in the patent application.
* The DMTJ has a PL1/TB1/free layer/TB2/PL2 configuration.
* The first tunnel barrier (TB1) has a lower resistance×area (RA) product than the second tunnel barrier (TB2).
* The magnetizations of the first and second pinned layers (PL1 and PL2) are aligned antiparallel.
* The DMTJ configuration provides an acceptable magnetoresistive ratio (DRR) and lower critical switching current.
* The condition RA1<RA2 is achieved by adjusting the thickness, oxidation state, or introducing dopants in TB1.
* Conductive pathways are formed in a metal oxide or metal oxynitride matrix for TB1.
* TB1 may contain a dopant to create conducting states in the TB1 band gap.
* Alternatively, TB1 can be replaced with a metallic spacer to improve conductivity between PL1 and the free layer (FL).

== Potential Applications ==
* Magnetic storage devices
* Magnetic sensors
* Magnetic random-access memory (MRAM)
* Spintronic devices

== Problems Solved ==
* Improved magnetoresistive ratio
* Lower critical switching current
* Enhanced conductivity between layers

== Benefits ==
* Higher performance and efficiency in magnetic devices
* Improved data storage and retrieval capabilities
* Increased sensitivity and accuracy in magnetic sensors
* Enhanced functionality and reliability of spintronic devices


==Original Abstract Submitted==

A dual magnetic tunnel junction (DMTJ) is disclosed with a PL1/TB1/free layer/TB2/PL2 configuration wherein a first tunnel barrier (TB1) has a substantially lower resistance×area (RA) product than RAfor an overlying second tunnel barrier (TB2) to provide an acceptable magnetoresistive ratio (DRR). Moreover, first and second pinned layers, PL1 and PL2, respectively, have magnetizations that are aligned antiparallel to enable a lower critical switching current that when in a parallel alignment. The condition RA1<RA2 is achieved with one or more of a smaller thickness and a lower oxidation state for TB1 compared with TB2, with conductive (metal) pathways formed in a metal oxide or metal oxynitride matrix for TB1, or with a TB1 containing a dopant to create conducting states in the TB1 band gap. Alternatively, TB1 may be replaced with a metallic spacer to improve conductivity between PL1 and the FL.



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