View source for 17944352. EFFICIENT SECURITY METADATA ENCODING IN ERROR CORRECTING CODE (ECC) MEMORY WITHOUT DEDICATED ECC BITS simplified abstract (Intel Corporation)

=EFFICIENT SECURITY METADATA ENCODING IN ERROR CORRECTING CODE (ECC) MEMORY WITHOUT DEDICATED ECC BITS=


==Organization Name==

[[:Category:Intel Corporation|Intel Corporation]]


[[Category:Intel Corporation]]

==Inventor(s)==

[[:Category:Sergej Deutsch of Hillsboro OR (US)|Sergej Deutsch of Hillsboro OR (US)]][[Category:Sergej Deutsch of Hillsboro OR (US)]]

[[:Category:David M. Durham of Beaverton OR (US)|David M. Durham of Beaverton OR (US)]][[Category:David M. Durham of Beaverton OR (US)]]

[[:Category:Karanvir Grewal of Hillsboro OR (US)|Karanvir Grewal of Hillsboro OR (US)]][[Category:Karanvir Grewal of Hillsboro OR (US)]]

[[:Category:Rajat Agarwal of Portland OR (US)|Rajat Agarwal of Portland OR (US)]][[Category:Rajat Agarwal of Portland OR (US)]]

==EFFICIENT SECURITY METADATA ENCODING IN ERROR CORRECTING CODE (ECC) MEMORY WITHOUT DEDICATED ECC BITS - A simplified explanation of the abstract==


This abstract first appeared for US patent application 17944352 titled 'EFFICIENT SECURITY METADATA ENCODING IN ERROR CORRECTING CODE (ECC) MEMORY WITHOUT DEDICATED ECC BITS

==Simplified Explanation==

The technology disclosed in this patent application involves a processor, a memory with a plurality of error correcting code (ECC) bits associated with the data, and a memory controller. The memory controller is responsible for receiving write requests from the processor and performing exclusive OR (XOR) operations on the ECC bits and a fixed encoding pattern when an access control field is selected in the write request. The result of this operation is a plurality of encoded ECC bits that are then stored in the memory along with the data.

* Processor
* Memory with ECC bits
* Memory controller
* Exclusive OR (XOR) operation
* Fixed encoding pattern
* Encoded ECC bits
* Write requests
* Access control field

== Potential Applications ==
* Data storage systems
* Error correction in memory systems
* Data integrity verification

== Problems Solved ==
* Data corruption
* Error detection and correction
* Ensuring data integrity

== Benefits ==
* Improved data reliability
* Enhanced error correction capabilities
* Increased data integrity
* Efficient storage and retrieval of data


==Original Abstract Submitted==

The technology disclosed herein comprises a processor; a memory to store data and a plurality of error correcting code (ECC) bits associated with the data; and a memory controller coupled to the memory, the memory controller to receive a write request from the processor and, when an access control field is selected in the write request, perform an exclusive OR (XOR) operation on the plurality of ECC bits and a fixed encoding pattern to generate a plurality of encoded ECC bits and store the data and the plurality of encoded ECC bits in the memory.



[[Category:G06F3/06]]