View source for 17935746. REFRESH CONTROL CIRCUIT AND METHOD, AND MEMORY simplified abstract (Changxin Memory Technologies, Inc.)

=REFRESH CONTROL CIRCUIT AND METHOD, AND MEMORY=


==Organization Name==

[[:Category:Changxin Memory Technologies, Inc.|Changxin Memory Technologies, Inc.]]


[[Category:Changxin Memory Technologies, Inc.]]

==Inventor(s)==

[[:Category:Jixing Chen of Hefei City (CN)|Jixing Chen of Hefei City (CN)]][[Category:Jixing Chen of Hefei City (CN)]]

[[:Category:Liang Chen of Hefei City (CN)|Liang Chen of Hefei City (CN)]][[Category:Liang Chen of Hefei City (CN)]]

==REFRESH CONTROL CIRCUIT AND METHOD, AND MEMORY - A simplified explanation of the abstract==


This abstract first appeared for US patent application 17935746 titled 'REFRESH CONTROL CIRCUIT AND METHOD, AND MEMORY

==Simplified Explanation==

The abstract describes a refresh control circuit for a memory array. The circuit includes an address output circuit, a block decoding circuit, and a row decoding circuit. 

* The address output circuit generates a to-be-refreshed address signal, which includes a block address signal and a row address signal.
* The block decoding circuit receives the block address signal and decodes it to generate a first block selection signal or a second block selection signal. 
* The first block selection signal is used when the memory array is not under a row hammer attack, and it selects multiple data blocks from the memory array. 
* The second block selection signal is used when the memory array is under a row hammer attack, and it selects only one data block from the memory array. 
* The row decoding circuit receives the row address signal and decodes it to generate a row selection signal.

Potential applications of this technology:
* Memory systems in computers, servers, and other electronic devices can benefit from this refresh control circuit to prevent row hammer attacks and improve memory performance.

Problems solved by this technology:
* Row hammer attacks can cause data corruption and system instability in memory arrays. This circuit helps mitigate the impact of such attacks by selecting appropriate data blocks for refresh.

Benefits of this technology:
* Improved security: By detecting row hammer attacks and selecting specific data blocks for refresh, the circuit enhances the security of memory systems.
* Enhanced performance: The circuit optimizes the refresh process by selecting multiple data blocks or a single data block based on the presence of a row hammer attack, leading to improved memory performance.


==Original Abstract Submitted==

A refresh control circuit includes the following: an address output circuit configured to output a to-be-refreshed address signal including a block address signal and a row address signal; a block decoding circuit configured to: receive the block address signal; decode the block address signal and output a first block selection signal for selecting multiple data blocks from the memory array, in response to that the memory array is subjected to no row hammer attack, or decode the block address signal and output a second block selection signal for selecting one data block from the memory array, in response to that the memory array is subjected to a row hammer attack; and a row decoding circuit, configured to receive the row address signal, decode the row address signal and output a row selection signal.



[[Category:G11C11/406]]
[[Category:G11C11/408]]