View source for 17879594. PACKAGE COMPRISING AN INTEGRATED DEVICE AND A FIRST METALLIZATION PORTION COUPLED TO A SECOND METALLIZATION PORTION simplified abstract (QUALCOMM Incorporated)

=PACKAGE COMPRISING AN INTEGRATED DEVICE AND A FIRST METALLIZATION PORTION COUPLED TO A SECOND METALLIZATION PORTION=


==Organization Name==

[[:Category:QUALCOMM Incorporated|QUALCOMM Incorporated]]


[[Category:QUALCOMM Incorporated]]

==Inventor(s)==

[[:Category:Hong Bok We of San Diego CA (US)|Hong Bok We of San Diego CA (US)]][[Category:Hong Bok We of San Diego CA (US)]]

[[:Category:Joan Rey Villarba Buot of Escondido CA (US)|Joan Rey Villarba Buot of Escondido CA (US)]][[Category:Joan Rey Villarba Buot of Escondido CA (US)]]

[[:Category:Aniket Patil of San Diego CA (US)|Aniket Patil of San Diego CA (US)]][[Category:Aniket Patil of San Diego CA (US)]]

==PACKAGE COMPRISING AN INTEGRATED DEVICE AND A FIRST METALLIZATION PORTION COUPLED TO A SECOND METALLIZATION PORTION - A simplified explanation of the abstract==


This abstract first appeared for US patent application 17879594 titled 'PACKAGE COMPRISING AN INTEGRATED DEVICE AND A FIRST METALLIZATION PORTION COUPLED TO A SECOND METALLIZATION PORTION

==Simplified Explanation==

The abstract describes a package that includes two integrated devices, each with its own metallization portion, and an encapsulation layer. The first metallization portion consists of a dielectric layer and a plurality of metallization interconnects, while the second metallization portion also includes a dielectric layer and a plurality of metallization interconnects.

* The package includes two integrated devices and their respective metallization portions.
* The first metallization portion has a dielectric layer and multiple metallization interconnects.
* The second metallization portion also has a dielectric layer and multiple metallization interconnects.
* An encapsulation layer is coupled to the first metallization portion, second integrated device, and second metallization portion.

Potential applications of this technology:

* Integrated circuit packaging: This package can be used in various integrated circuit applications, such as microprocessors, memory chips, and communication devices.
* Electronic devices: The package can be utilized in the manufacturing of electronic devices like smartphones, tablets, and laptops.

Problems solved by this technology:

* Improved integration: The package allows for the integration of multiple devices and their respective metallization portions, enabling more compact and efficient circuitry.
* Enhanced electrical connectivity: The metallization interconnects provide improved electrical connectivity between the integrated devices, facilitating better performance and signal transmission.

Benefits of this technology:

* Space-saving: The integration of multiple devices and their metallization portions into a single package saves space and reduces the overall size of electronic devices.
* Improved performance: The enhanced electrical connectivity and efficient circuitry design contribute to improved performance and functionality of integrated circuits.
* Cost-effective: The package design and integration of components can lead to cost savings in manufacturing processes.


==Original Abstract Submitted==

A package comprising a first integrated device, a first metallization portion coupled to the first integrated device, a second integrated device, a second metallization portion coupled to the second integrated device and the first metallization portion, and an encapsulation layer coupled to the first metallization portion, the second integrated device and the second metallization portion. The first metallization portion includes at least one first dielectric layer and a first plurality of metallization interconnects. The second metallization portion includes at least one second dielectric layer and a second plurality of metallization interconnects.



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