View source for 17851985. INTEGRATED CIRCUIT STRUCTURES HAVING MEMORY WITH BACKSIDE POWER DELIVERY simplified abstract (Intel Corporation)

=INTEGRATED CIRCUIT STRUCTURES HAVING MEMORY WITH BACKSIDE POWER DELIVERY=


==Organization Name==

[[:Category:Intel Corporation|Intel Corporation]]


[[Category:Intel Corporation]]

==Inventor(s)==

[[:Category:Abhishek Anil Sharma of Portland OR (US)|Abhishek Anil Sharma of Portland OR (US)]][[Category:Abhishek Anil Sharma of Portland OR (US)]]

[[:Category:Wilfred Gomes of Portland OR (US)|Wilfred Gomes of Portland OR (US)]][[Category:Wilfred Gomes of Portland OR (US)]]

==INTEGRATED CIRCUIT STRUCTURES HAVING MEMORY WITH BACKSIDE POWER DELIVERY - A simplified explanation of the abstract==


This abstract first appeared for US patent application 17851985 titled 'INTEGRATED CIRCUIT STRUCTURES HAVING MEMORY WITH BACKSIDE POWER DELIVERY

==Simplified Explanation==

The patent application describes structures with memory and backside power delivery. The integrated circuit structure includes a front-side structure with nanowire-based transistors and metallization layers. One of the metal layers has an array of uninterrupted signal lines. The backside structure includes a ground metal line.

* The integrated circuit structure includes nanowire-based transistors and metallization layers.
* One of the metal layers has an array of uninterrupted signal lines.
* The backside structure includes a ground metal line.

==Potential Applications==
This technology has potential applications in various fields, including:

* Electronics manufacturing
* Semiconductor industry
* Memory devices
* Integrated circuits

==Problems Solved==
The technology addresses the following problems:

* Efficient power delivery in integrated circuits
* Signal line interruptions in metal layers
* Grounding issues in backside structures

==Benefits==
The technology offers the following benefits:

* Improved power delivery efficiency
* Uninterrupted signal lines for better performance
* Enhanced grounding capabilities in backside structures


==Original Abstract Submitted==

Structures having memory with backside power delivery are described. In an example, an integrated circuit structure includes a front-side structure including a device layer having a plurality of nanowire-based transistors, and a plurality of metallization layers above the nanowire-based transistors of the device layer. One of the metal layers includes an array of uninterrupted signal lines. A backside structure is below the nanowire-based transistors of the device layer. The backside structure includes a ground metal line.



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