View source for 17478539. INTEGRATED CIRCUITS (ICs) EMPLOYING DIRECTLY COUPLED METAL LINES BETWEEN VERTICALLY-ADJACENT INTERCONNECT LAYERS FOR REDUCED COUPLING RESISTANCE, AND RELATED METHODS simplified abstract (QUALCOMM Incorporated)

=INTEGRATED CIRCUITS (ICs) EMPLOYING DIRECTLY COUPLED METAL LINES BETWEEN VERTICALLY-ADJACENT INTERCONNECT LAYERS FOR REDUCED COUPLING RESISTANCE, AND RELATED METHODS=


==Organization Name==

[[:Category:QUALCOMM Incorporated|QUALCOMM Incorporated]]


[[Category:QUALCOMM Incorporated]]

==Inventor(s)==

[[:Category:John Jianhong Zhu of San Diego CA (US)|John Jianhong Zhu of San Diego CA (US)]][[Category:John Jianhong Zhu of San Diego CA (US)]]

[[:Category:Junjing Bao of San Diego CA (US)|Junjing Bao of San Diego CA (US)]][[Category:Junjing Bao of San Diego CA (US)]]

[[:Category:Giridhar Nallapati of San Diego CA (US)|Giridhar Nallapati of San Diego CA (US)]][[Category:Giridhar Nallapati of San Diego CA (US)]]

==INTEGRATED CIRCUITS (ICs) EMPLOYING DIRECTLY COUPLED METAL LINES BETWEEN VERTICALLY-ADJACENT INTERCONNECT LAYERS FOR REDUCED COUPLING RESISTANCE, AND RELATED METHODS - A simplified explanation of the abstract==


This abstract first appeared for US patent application 17478539 titled 'INTEGRATED CIRCUITS (ICs) EMPLOYING DIRECTLY COUPLED METAL LINES BETWEEN VERTICALLY-ADJACENT INTERCONNECT LAYERS FOR REDUCED COUPLING RESISTANCE, AND RELATED METHODS

==Simplified Explanation==

The patent application describes integrated circuits (ICs) that use directly coupled metal lines between vertically-adjacent interconnect layers, without the need for an intermediate via layer. This reduces coupling resistance and overall height of the IC.

* The ICs employ directly coupled metal lines between vertically-adjacent interconnect layers.
* There is no intermediate vertical interconnect access (via) layer with vias connecting the metal lines.
* Overlying and underlying metal lines in adjacent interconnect layers are directly coupled without the need for an intermediate via layer.
* Insulating layers are used in select recessed regions to insulate metal lines that are not intended to be electrically coupled.

==Potential Applications==
* Integrated circuits manufacturing
* Electronics industry

==Problems Solved==
* Reduces coupling resistance between metal lines in ICs
* Reduces overall height of the IC

==Benefits==
* Improved performance and efficiency of integrated circuits
* Simplified manufacturing process
* Reduced contact resistance between metal lines


==Original Abstract Submitted==

Integrated circuits (ICs), including capacitors and inductors, employing directly coupled metal lines between vertically-adjacent interconnect layers for reduced coupling resistance, and related fabrication methods. By directly coupled, it is meant that there is not an intermediate vertical interconnect access (via) layer with a via(s) interconnecting the metal lines in vertically-adjacent interconnect layers. An overlying and underlying metal line in respective and vertically-adjacent overlying and underlying interconnect layers are directly coupled to each other without the need for an intermediate via layer. For example, directly coupled metal in adjacent interconnect layers of lC can reduce contact resistance between the metal lines and reduce the overall height of the IC. An insulating layer(s) can be disposed in select recessed regions between the overlying interconnect layer and the underlying interconnect layer to insulate an overlying metal line from another vertically-intersecting underlying metal line that are not intended to be electrically coupled together.



[[Category:H01L23/522]]