SEARCH RESULTS for assignor:"YEH, CHUN-CHEN"

Showing 1 to 20 of 40 results

Last Update Patent(s) Assignor(s) Orig. Assignee(s) Assignee(s) Reel/Frame
12-Jun-2018

(X0) 1: IMPLANTATION FORMED METAL-INSULATOR-SEMICONDUCTOR (MIS) CONTACTS

(A1) 2: IMPLANTATION FORMED METAL-INSULATOR-SEMICONDUCTOR (MIS) CONTACTS

(B2) 9: IMPLANTATION FORMED METAL-INSULATOR-SEMICONDUCTOR (MIS) CONTACTS

CHEN, CHIA-YU

LIU, ZUOGUANG

YAMASHITA, TENKO

YEH, CHUN-CHEN

INTERNATIONAL BUSINESS MACHINES CORPORATION

37965/947

12-Jun-2018

(X0) 1: NON-LITHOGRAPHIC LINE PATTERN FORMATION

(A1) 2: NON-LITHOGRAPHIC LINE PATTERN FORMATION

(B2) 9: NON-LITHOGRAPHIC LINE PATTERN FORMATION

TSENG, CHIAHSUN

HORAK, DAVID V.

YEH, CHUN-CHEN

YIN, YUNPENG

INTERNATIONAL BUSINESS MACHINES CORPORATION

39180/912

12-Jun-2018

(X0) 1: DUAL LINER SILICIDE

(A1) 2: DUAL LINER SILICIDE

(B2) 9: DUAL LINER SILICIDE

PRANATHARTHIHARAN, BALASUBRAMANIAN

YEH, CHUN-CHEN

INTERNATIONAL BUSINESS MACHINES CORPORATION

39477/311

31-May-2018

(X0) 1: SPACERS FOR TIGHT GATE PITCHES IN FIELD EFFECT TRANSISTORS

(A1) 2: SPACERS FOR TIGHT GATE PITCHES IN FIELD EFFECT TRANSISTORS

XIE, RUILONG

YEH, CHUN-CHEN

GLOBALFOUNDRIES INC.

40431/78

29-May-2018

(X0) 1: FINFET SEMICONDUCTOR DEVICE HAVING INTEGRATED SIGE FIN

(A1) 2: FINFET SEMICONDUCTOR DEVICE HAVING INTEGRATED SIGE FIN

(B2) 9: FINFET SEMICONDUCTOR DEVICE HAVING INTEGRATED SIGE FIN

CHENG, KANGGUO

HE, HONG

KHAKIFIROOZ, ALI

TSENG, CHIAHSUN

YEH, CHUN-CHEN

YIN, YUNPENG

INTERNATIONAL BUSINESS MACHINES CORPORATION

34578/515

29-May-2018

(X0) 1: HIGH THERMAL BUDGET COMPATIBLE PUNCH THROUGH STOP INTEGRATION USING DOPED GLASS

(A1) 2: HIGH THERMAL BUDGET COMPATIBLE PUNCH THROUGH STOP INTEGRATION USING DOPED GLASS

(B2) 9: HIGH THERMAL BUDGET COMPATIBLE PUNCH THROUGH STOP INTEGRATION USING DOPED GLASS

CHENG, KANGGUO

MEHTA, SANJAY C.

MIAO, XIN

YEH, CHUN-CHEN

INTERNATIONAL BUSINESS MACHINES CORPORATION

39135/961

29-May-2018

(X0) 1: SALICIDE FORMATION ON REPLACEMENT METAL GATE FINFET DEVICES

(A1) 2: SALICIDE FORMATION ON REPLACEMENT METAL GATE FINFET DEVICES

(B2) 9: SALICIDE FORMATION ON REPLACEMENT METAL GATE FINFET DEVICES

LEOBANDUNG, EFFENDI

SEO, SOON-CHEON

YAMASHITA, TENKO

YEH, CHUN-CHEN

INTERNATIONAL BUSINESS MACHINES CORPORATION

40173/1

17-May-2018

(X0) 1: FABRICATION OF VERTICAL FIELD EFFECT TRANSISTOR STRUCTURE WITH CONTROLLED GATE LENGTH

(A1) 2: FABRICATION OF VERTICAL FIELD EFFECT TRANSISTOR STRUCTURE WITH CONTROLLED GATE LENGTH

CHENG, KANGGUO

YAMASHITA, TENKO

YEH, CHUN-CHEN

XIE, RUILONG

INTERNATIONAL BUSINESS MACHINES CORPORATION

44472/931

03-May-2018

(X0) 1: INTEGRATION OF VERTICAL-TRANSPORT TRANSISTORS AND ELECTRICAL FUSES

(A1) 2: INTEGRATION OF VERTICAL-TRANSPORT TRANSISTORS AND ELECTRICAL FUSES

XIE, RUILONG

CHENG, KANGGUO

YAMASHITA, TENKO

YEH, CHUN-CHEN

GLOBALFOUNDRIES INC.

40175/819

03-May-2018

(X0) 1: INNER SPACER FOR NANOSHEET TRANSISTORS

(A1) 2: INNER SPACER FOR NANOSHEET TRANSISTORS

CHENG, KANGGUO

XIE, RUILONG

YAMASHITA, TENKO

YEH, CHUN-CHEN

INTERNATIONAL BUSINESS MACHINES CORPORATION

44257/92

03-May-2018

(X0) 1: FIN FIELD EFFECT TRANSISTOR FABRICATION AND DEVICES HAVING INVERTED T-SHAPED GATE

(A1) 2: FIN FIELD EFFECT TRANSISTOR FABRICATION AND DEVICES HAVING INVERTED T-SHAPED GATE

BASKER, VEERARAGHAVAN S.

LIU, ZUOGUANG

YAMASHITA, TENKO

YEH, CHUN-CHEN

INTERNATIONAL BUSINESS MACHINES CORPORATION

44420/804

03-May-2018

(X0) 1: DUAL LINER SILICIDE

(A1) 2: DUAL LINER SILICIDE

PRANATHARTHIHARAN, BALASUBRAMANIAN

YEH, CHUN-CHEN

INTERNATIONAL BUSINESS MACHINES CORPORATION

44437/70

01-May-2018

(X0) 1: METHOD OF FORMING VERTICAL FIELD EFFECT TRANSISTORS WITH DIFFERENT THRESHOLD VOLTAGES AND THE RESULTING INTEGRATED CIRCUIT STRUCTURE

(B1) 9: METHOD OF FORMING VERTICAL FIELD EFFECT TRANSISTORS WITH DIFFERENT THRESHOLD VOLTAGES AND THE RESULTING INTEGRATED CIRCUIT STRUCTURE

XIE, RUILONG

YEH, CHUN-CHEN

YAMASHITA, TENKO

CHENG, KANGGUO

GLOBALFOUNDRIES INC.

42044/656

17-Apr-2018

(X0) 1: FINFET WITH MERGE-FREE FINS

(A1) 2: FINFET WITH MERGE-FREE FINS

(B2) 9: FINFET WITH MERGE-FREE FINS

HE, HONG

TSENG, CHIAHSUN

WANG, JUNLI

YEH, CHUN-CHEN

YIN, YUNPENG

INTERNATIONAL BUSINESS MACHINES CORPORATION

30996/106

17-Apr-2018

(X0) 1: TUNNELING FIN TYPE FIELD EFFECT TRANSISTOR WITH EPITAXIAL SOURCE AND DRAIN REGIONS

(A1) 2: TUNNELING FIN TYPE FIELD EFFECT TRANSISTOR WITH EPITAXIAL SOURCE AND DRAIN REGIONS

(B2) 9: TUNNELING FIN TYPE FIELD EFFECT TRANSISTOR WITH EPITAXIAL SOURCE AND DRAIN REGIONS

BASKER, VEERARAGHAVAN S.

LIU, ZUOGUANG

YAMASHITA, TENKO

YEH, CHUN-CHEN

INTERNATIONAL BUSINESS MACHINES CORPORATION

37727/726

17-Apr-2018

(X0) 1: NANOWIRE SEMICONDUCTOR DEVICE INCLUDING LATERAL-ETCH BARRIER REGION

(A1) 2: NANOWIRE SEMICONDUCTOR DEVICE INCLUDING LATERAL-ETCH BARRIER REGION

(B2) 9: NANOWIRE SEMICONDUCTOR DEVICE INCLUDING LATERAL-ETCH BARRIER REGION

BASKER, VEERARAGHAVAN S.

LIU, ZUOGUANG

YAMASHITA, TENKO

YEH, CHUN-CHEN

INTERNATIONAL BUSINESS MACHINES CORPORATION

39355/808

12-Apr-2018

(X0) 1: STRESS MEMORIZATION TECHNIQUE FOR STRAIN COUPLING ENHANCEMENT IN BULK FINFET DEVICE

(A1) 2: STRESS MEMORIZATION TECHNIQUE FOR STRAIN COUPLING ENHANCEMENT IN BULK FINFET DEVICE

CHENG, KANGGUO

LI, JUNTAO

YEH, CHUN-CHEN

INTERNATIONAL BUSINESS MACHINES CORPORATION

44385/616

05-Apr-2018

(X0) 1: REDUCED CAPACITANCE IN VERTICAL TRANSISTORS BY PREVENTING EXCESSIVE OVERLAP BETWEEN THE GATE AND THE SOURCE/DRAIN

(A1) 2: REDUCED CAPACITANCE IN VERTICAL TRANSISTORS BY PREVENTING EXCESSIVE OVERLAP BETWEEN THE GATE AND THE SOURCE/DRAIN

CHENG, KANGGUO

XIE, RUILONG

YAMASHITA, TENKO

YEH, CHUN-CHEN

INTERNATIONAL BUSINESS MACHINES CORPORATION

41263/1

03-Apr-2018

(X0) 1: METHODS OF FORMING VERTICAL TRANSISTOR DEVICES WITH DIFFERENT EFFECTIVE GATE LENGTHS

(B1) 9: METHODS OF FORMING VERTICAL TRANSISTOR DEVICES WITH DIFFERENT EFFECTIVE GATE LENGTHS

XIE, RUILONG

YEH, CHUN-CHEN

YAMASHITA, TENKO

CHENG, KANGGUO

GLOBALFOUNDRIES INC.

41289/179

29-Mar-2018

(X0) 1: CONTROLLING SELF-ALIGNED GATE LENGTH IN VERTICAL TRANSISTOR REPLACEMENT GATE FLOW

(A1) 2: CONTROLLING SELF-ALIGNED GATE LENGTH IN VERTICAL TRANSISTOR REPLACEMENT GATE FLOW

XIE, RUILONG

YAMASHITA, TENKO

CHENG, KANGGUO

YEH, CHUN-CHEN

GLOBALFOUNDRIES INC.

39898/344