SEARCH RESULTS for assignor:"XIONG, CHENRONG"

Showing 1 to 8 of 8 results

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(X0) 15346158: BIT-FLIPPING LDPC DECODING ALGORITHM WITH HARD CHANNEL INFORMATION

(A1) 20180131389: BIT-FLIPPING LDPC DECODING ALGORITHM WITH HARD CHANNEL INFORMATION

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(X0) 15788524: MEMORY SYSTEM WITH LDPC DECODER AND OPERATING METHOD THEREOF

(A1) 20180113760: MEMORY SYSTEM WITH LDPC DECODER AND OPERATING METHOD THEREOF

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(X0) 15663470: Memory System of Optimal Read Reference Voltage and Operating Method thereof

(A1) 20180046373: Memory System of Optimal Read Reference Voltage and Operating Method thereof

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(X0) 15487239: REDUNDANT BYTES UTILIZATION IN ERROR CORRECTION CODE

(A1) 20180046540: REDUNDANT BYTES UTILIZATION IN ERROR CORRECTION CODE

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(X0) 15495590: TECHNIQUES FOR DYNAMICALLY DETERMINING PERFORMANCE OF READ RECLAIM OPERATIONS

(A1) 20180047456: TECHNIQUES FOR DYNAMICALLY DETERMINING PERFORMANCE OF READ RECLAIM OPERATIONS

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(X0) 15473237: MODIFIABLE STRIPE LENGTH IN FLASH MEMORY DEVICES

(A1) 20180046538: MODIFIABLE STRIPE LENGTH IN FLASH MEMORY DEVICES

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(X0) 15599059: UNUSABLE COLUMN MAPPING IN FLASH MEMORY DEVICES

(A1) 20180046372: UNUSABLE COLUMN MAPPING IN FLASH MEMORY DEVICES

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(X0) 15589863: LAYER-BASED MEMORY CONTROLLER OPTIMIZATIONS FOR THREE DIMENSIONAL MEMORY CONSTRUCTS

(A1) 20180047453: LAYER-BASED MEMORY CONTROLLER OPTIMIZATIONS FOR THREE DIMENSIONAL MEMORY CONSTRUCTS