SEARCH RESULTS for assignor:"TSENG, LEE-CHUAN"

Showing 1 to 5 of 5 results

Last Update Patent(s) Assignor(s) Orig. Assignee(s) Assignee(s) Reel/Frame
22-May-2018

(X0) 1: WAFER LEVEL HERMETIC SEAL PROCESS FOR MICROELECTROMECHANICAL SYSTEMS (MEMS) DEVICES

(A1) 2: WAFER LEVEL HERMETIC SEAL PROCESS FOR MICROELECTROMECHANICAL SYSTEMS (MEMS) DEVICES

(B2) 9: WAFER LEVEL HERMETIC SEAL PROCESS FOR MICROELECTROMECHANICAL SYSTEMS (MEMS) DEVICES

TSENG, LEE-CHUAN

CHOU, CHUNG-YEN

LIU, SHIH-CHANG

HSIEH, YUAN-CHIH

TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

35777/16

17-May-2018

(X0) 1: METHOD AND APPARATUS FOR REDUCING IN-PROCESS AND IN-USE STICTION FOR MEMS DEVICES

(A1) 2: METHOD AND APPARATUS FOR REDUCING IN-PROCESS AND IN-USE STICTION FOR MEMS DEVICES

TSENG, LEE-CHUAN

WU, CHANG-MING

LIU, SHIH-CHANG

HSIEH, YUAN-CHIH

TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

44463/769

17-Apr-2018

(X0) 1: HIGH ASPECT RATIO ETCH WITHOUT UPPER WIDENING

(A1) 2: HIGH ASPECT RATIO ETCH WITHOUT UPPER WIDENING

(B2) 9: HIGH ASPECT RATIO ETCH WITHOUT UPPER WIDENING

CHOU, CHUNG-YEN

TSAI, CHIA-SHIUNG

TSENG, LEE-CHUAN

LEE, RU-LIANG

TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

35708/737

29-Mar-2018

(X0) 1: DIELECTRIC SIDEWALL STRUCTURE FOR QUALITY IMPROVEMENT IN GE AND SIGE DEVICES

(A1) 2: DIELECTRIC SIDEWALL STRUCTURE FOR QUALITY IMPROVEMENT IN GE AND SIGE DEVICES

CHEN, CHIH-MING

TSENG, LEE-CHUAN

LIU, MING CHYI

LIU, PO-CHUN

TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

40254/770

30-Jan-2018

(X0) 1: METHOD AND APPARATUS FOR REDUCING IN-PROCESS AND IN-USE STICTION FOR MEMS DEVICES

(A1) 2: METHOD AND APPARATUS FOR REDUCING IN-PROCESS AND IN-USE STICTION FOR MEMS DEVICES

(B2) 9: METHOD AND APPARATUS FOR REDUCING IN-PROCESS AND IN-USE STICTION FOR MEMS DEVICES

TSENG, LEE-CHUAN

WU, CHANG-MING

LIU, SHIH-CHANG

HSIEH, YUAN-CHIH

TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

37041/560