SEARCH RESULTS for assignor:"LEE, TZUNG-CHI"

Showing 1 to 4 of 4 results

Last Update Patent(s) Assignor(s) Orig. Assignee(s) Assignee(s) Reel/Frame
17-May-2018

(X0) 1: DUMMY FIN CELL PLACEMENT IN AN INTEGRATED CIRCUIT LAYOUT

(A1) 2: DUMMY FIN CELL PLACEMENT IN AN INTEGRATED CIRCUIT LAYOUT

HSIEH, TUNG-HENG

YOUNG, BAO-RU

CHANG, YU-JUNG

LEE, TZUNG-CHI

TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

44485/912

10-May-2018

(X0) 1: SYSTEM AND METHOD OF FABRICATING ESD FINFET WITH IMPROVED METAL LANDING IN THE DRAIN

(A1) 2: SYSTEM AND METHOD OF FABRICATING ESD FINFET WITH IMPROVED METAL LANDING IN THE DRAIN

LEE, TZUNG-CHI

HSIEH, TUNG-HENG

YOUNG, BAO-RU

CHANG, YUNG FENG

TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

44547/776

09-Jan-2018

(X0) 1: SYSTEM AND METHOD OF FABRICATING ESD FINFET WITH IMPROVED METAL LANDING IN THE DRAIN

(B1) 9: SYSTEM AND METHOD OF FABRICATING ESD FINFET WITH IMPROVED METAL LANDING IN THE DRAIN

LEE, TZUNG-CHI

HSIEH, TUNG-HENG

YOUNG, BAO-RU

CHANG, YUNG FENG

TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

40538/1

04-Jan-2018

(X0) 1: DUMMY FIN CELL PLACEMENT IN AN INTEGRATED CIRCUIT LAYOUT

(A1) 2: DUMMY FIN CELL PLACEMENT IN AN INTEGRATED CIRCUIT LAYOUT

HSIEH, TUNG-HENG

YOUNG, BAO-RU

CHANG, YU-JUNG

LEE, TZUNG-CHI

TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

39315/161