SEARCH RESULTS for assignor:"BHATIA, AMAN"

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(X0) 15432255: PERFORMANCE OPTIMIZATION IN SOFT DECODING OF ERROR CORRECTING CODES

(A1) 20170279467: PERFORMANCE OPTIMIZATION IN SOFT DECODING OF ERROR CORRECTING CODES

(B2) 1: PERFORMANCE OPTIMIZATION IN SOFT DECODING OF ERROR CORRECTING CODES

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(X0) 15433857: HYBRID SOFT DECODING ALGORITHM FOR MULTIPLE-DIMENSION TPC CODES

(A1) 20170279466: HYBRID SOFT DECODING ALGORITHM FOR MULTIPLE-DIMENSION TPC CODES

(B2) 1: HYBRID SOFT DECODING ALGORITHM FOR MULTIPLE-DIMENSION TPC CODES

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(X0) 15431554: SOFT DECODER PARAMETER OPTIMIZATION FOR PRODUCT CODES

(A1) 20170279465: SOFT DECODER PARAMETER OPTIMIZATION FOR PRODUCT CODES

(B2) 1: SOFT DECODER PARAMETER OPTIMIZATION FOR PRODUCT CODES

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(X0) 15460165: STATE-BASED DECODING OF PRODUCT CODES

(A1) 20180269905: STATE-BASED DECODING OF PRODUCT CODES

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(X0) 15356069: DATA MAPPING SCHEME FOR GENERALIZED PRODUCT CODES

(A1) 20180145705: DATA MAPPING SCHEME FOR GENERALIZED PRODUCT CODES

(B2) 1: DATA MAPPING SCHEME FOR GENERALIZED PRODUCT CODES

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(X0) 15159331: TECHNIQUES FOR LOW COMPLEXITY TURBO PRODUCT CODE DECODING

(A1) 20170155407: TECHNIQUES FOR LOW COMPLEXITY TURBO PRODUCT CODE DECODING

(B2) 9: TECHNIQUES FOR LOW COMPLEXITY TURBO PRODUCT CODE DECODING

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(X0) 15346158: BIT-FLIPPING LDPC DECODING ALGORITHM WITH HARD CHANNEL INFORMATION

(A1) 20180131389: BIT-FLIPPING LDPC DECODING ALGORITHM WITH HARD CHANNEL INFORMATION

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(X0) 15788524: MEMORY SYSTEM WITH LDPC DECODER AND OPERATING METHOD THEREOF

(A1) 20180113760: MEMORY SYSTEM WITH LDPC DECODER AND OPERATING METHOD THEREOF

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(X0) 15049955: SCHEME TO AVOID MISCORRECTION FOR TURBO PRODUCT CODES

(A1) 20160248447: SCHEME TO AVOID MISCORRECTION FOR TURBO PRODUCT CODES

(B2) 9: SCHEME TO AVOID MISCORRECTION FOR TURBO PRODUCT CODES

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Patent(s)

(X0) 15158416: PERFORMANCE OPTIMIZATION IN SOFT DECODING FOR TURBO PRODUCT CODES

(A1) 20160344426: PERFORMANCE OPTIMIZATION IN SOFT DECODING FOR TURBO PRODUCT CODES

(B2) 9: PERFORMANCE OPTIMIZATION IN SOFT DECODING FOR TURBO PRODUCT CODES

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(X0) 14948197: APPARATUS AND METHOD FOR TURBO PRODUCT CODES

(A1) 20160149592: APPARATUS AND METHOD FOR TURBO PRODUCT CODES

(B2) 9: APPARATUS AND METHOD FOR TURBO PRODUCT CODES

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(X0) 15173198: ONE-SHOT DECODER FOR TWO-ERROR-CORRECTING BCH CODES

(A1) 20160359502: ONE-SHOT DECODER FOR TWO-ERROR-CORRECTING BCH CODES

(B2) 9: ONE-SHOT DECODER FOR TWO-ERROR-CORRECTING BCH CODES

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(X0) 15674134: PAGE HEALTH PREDICTION USING PRODUCT CODES DECODER IN NAND FLASH STORAGE

(A1) 20180048434: PAGE HEALTH PREDICTION USING PRODUCT CODES DECODER IN NAND FLASH STORAGE

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(X0) 15487239: REDUNDANT BYTES UTILIZATION IN ERROR CORRECTION CODE

(A1) 20180046540: REDUNDANT BYTES UTILIZATION IN ERROR CORRECTION CODE

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(X0) 15495590: TECHNIQUES FOR DYNAMICALLY DETERMINING PERFORMANCE OF READ RECLAIM OPERATIONS

(A1) 20180047456: TECHNIQUES FOR DYNAMICALLY DETERMINING PERFORMANCE OF READ RECLAIM OPERATIONS

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(X0) 15473237: MODIFIABLE STRIPE LENGTH IN FLASH MEMORY DEVICES

(A1) 20180046538: MODIFIABLE STRIPE LENGTH IN FLASH MEMORY DEVICES

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(X0) 15589863: LAYER-BASED MEMORY CONTROLLER OPTIMIZATIONS FOR THREE DIMENSIONAL MEMORY CONSTRUCTS

(A1) 20180047453: LAYER-BASED MEMORY CONTROLLER OPTIMIZATIONS FOR THREE DIMENSIONAL MEMORY CONSTRUCTS

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(X0) 15460160: LOW LATENCY SOFT DECODER ARCHITECTURE FOR GENERALIZED PRODUCT CODES

(A1) 20180048332: LOW LATENCY SOFT DECODER ARCHITECTURE FOR GENERALIZED PRODUCT CODES