SEARCH RESULTS for assignee:"VIA ALLIANCE SEMICONDUCTOR CO., LTD."

Showing 1 to 20 of 50 results

Last Update Patent(s) Assignor(s) Orig. Assignee(s) Assignee(s) Reel/Frame
14-Jun-2018

(X0) 1: NEURAL NETWORK UNIT WITH MIXED DATA AND WEIGHT SIZE COMPUTATION CAPABILITY

(A1) 2: NEURAL NETWORK UNIT WITH MIXED DATA AND WEIGHT SIZE COMPUTATION CAPABILITY

HENRY, G. GLENN

HOUCK, KIM C.

VIA ALLIANCE SEMICONDUCTOR CO., LTD.

40804/185

12-Jun-2018

(X0) 1: METHOD AND DEVICE FOR PROCESSING GRAPHICS

(A1) 2: METHOD AND DEVICE FOR PROCESSING GRAPHICS

(B2) 9: METHOD AND DEVICE FOR PROCESSING GRAPHICS

WANG, YANJIE

ZHU, CHENYANG

VIA ALLIANCE SEMICONDUCTOR CO., LTD.

38661/804

12-Jun-2018

(X0) 1: METHODS FOR PREFETCHING DATA AND APPARATUSES USING THE SAME

(A1) 2: METHODS FOR PREFETCHING DATA AND APPARATUSES USING THE SAME

(B2) 9: METHODS FOR PREFETCHING DATA AND APPARATUSES USING THE SAME

VIA ALLIANCE SEMICONDUCTOR CO., LTD.

40493/18

31-May-2018

(X0) 1: METHODS FOR EXECUTING A COMPUTER INSTRUCTION AND APPARATUSES USING THE SAME

(A1) 2: METHODS FOR EXECUTING A COMPUTER INSTRUCTION AND APPARATUSES USING THE SAME

ZHANG, ZHI

CHEN, JING

VIA ALLIANCE SEMICONDUCTOR CO., LTD.

40946/521

31-May-2018

(X0) 1: METHODS FOR CALCULATING FLOATING-POINT OPERANDS AND APPARATUSES USING THE SAME

(A1) 2: METHODS FOR CALCULATING FLOATING-POINT OPERANDS AND APPARATUSES USING THE SAME

ZHANG, ZHI

CHEN, JING

VIA ALLIANCE SEMICONDUCTOR CO., LTD.

41192/956

24-May-2018

(X0) 1: METHODS FOR COMPRESSING AND DECOMPRESSING TEXTURE TILES AND APPARATUSES USING THE SAME

(A1) 2: METHODS FOR COMPRESSING AND DECOMPRESSING TEXTURE TILES AND APPARATUSES USING THE SAME

SHEN, YEMAO

GU, DEMING

QUE, HENG

ZHANG, WEI

VIA ALLIANCE SEMICONDUCTOR CO., LTD.

40468/114

24-May-2018

(X0) 1: METHODS FOR COMPRESSING AND DECOMPRESSING TEXTURE TILES AND APPARATUSES USING THE SAME

(A1) 2: METHODS FOR COMPRESSING AND DECOMPRESSING TEXTURE TILES AND APPARATUSES USING THE SAME

SHEN, YEMAO

GU, DEMING

QUE, HENG

ZHANG, WEI

VIA ALLIANCE SEMICONDUCTOR CO., LTD.

40468/318

24-May-2018

(X0) 1: SCANNABLE DATA SYNCHRONIZER

(A1) 2: SCANNABLE DATA SYNCHRONIZER

VIA ALLIANCE SEMICONDUCTOR CO., LTD.

40713/349

22-May-2018

(X0) 1: METHODS FOR ACCELERATING HASH-BASED COMPRESSION AND APPARATUSES USING THE SAME

(B1) 9: METHODS FOR ACCELERATING HASH-BASED COMPRESSION AND APPARATUSES USING THE SAME

LI, XIAOYANG

QI, ZONGPU

WANG, ZHENG

YANG, MENGCHEN

WU, FANGFANG

LUO, SHICAN

MENG, LEI

YU, JIN

HO, KUAN-JUI

LI, LIN

VIA ALLIANCE SEMICONDUCTOR CO., LTD.

43258/500

17-May-2018

(X0) 1: PROCESSOR WITH INSTRUCTION CACHE THAT PERFORMS ZERO CLOCK RETIRES

(A1) 2: PROCESSOR WITH INSTRUCTION CACHE THAT PERFORMS ZERO CLOCK RETIRES

VIA ALLIANCE SEMICONDUCTOR CO., LTD.

40308/646

17-May-2018

(X0) 1: EFFICIENT RANDOM NUMBER GENERATION FOR UPDATE EVENTS IN MULTI-BANK CONDITIONAL BRANCH PREDICTOR

(A1) 2: EFFICIENT RANDOM NUMBER GENERATION FOR UPDATE EVENTS IN MULTI-BANK CONDITIONAL BRANCH PREDICTOR

YANG, MENGCHEN

CHEN, GUOHUA

WANG, XIAOLING

VIA ALLIANCE SEMICONDUCTOR CO., LTD

40457/469

17-May-2018

(X0) 1: PROCESSOR WITH INSTRUCTION CACHE THAT PERFORMS ZERO CLOCK RETIRES

(A1) 2: PROCESSOR WITH INSTRUCTION CACHE THAT PERFORMS ZERO CLOCK RETIRES

VIA ALLIANCE SEMICONDUCTOR CO., LTD.

40465/34

17-May-2018

(X0) 1: MOBILE DEVICES AND METHODS FOR DETERMINING ORIENTATION INFORMATION THEREOF

(A1) 2: MOBILE DEVICES AND METHODS FOR DETERMINING ORIENTATION INFORMATION THEREOF

LIN, XIA

WU, DONGXING

GU, DEMING

MAO, YANG

VIA ALLIANCE SEMICONDUCTOR CO., LTD.

40479/631

15-May-2018

(X0) 1: SANITIZE-AWARE DRAM CONTROLLER

(A1) 2: SANITIZE-AWARE DRAM CONTROLLER

(B2) 9: SANITIZE-AWARE DRAM CONTROLLER

PARKS, TERRY

HOOKER, RODNEY E.

REED, DOUGLAS R.

VIA ALLIANCE SEMICONDUCTOR CO., LTD.

40142/540

01-May-2018

(X0) 1: METHOD AND DEVICE FOR MERGING GRAPHIC LAYERS

(A1) 2: METHOD AND DEVICE FOR MERGING GRAPHIC LAYERS

(B2) 9: METHOD AND DEVICE FOR MERGING GRAPHIC LAYERS

WANG, YANJIE

ZHU, CHENYANG

VIA ALLIANCE SEMICONDUCTOR CO., LTD.

38661/544

01-May-2018

(X0) 1: METHOD AND DEVICE FOR IMAGE PROCESSING

(A1) 2: METHOD AND DEVICE FOR IMAGE PROCESSING

(B2) 9: METHOD AND DEVICE FOR IMAGE PROCESSING

WU, FENGXIA

ZHANG, WEI

HONG, ZHOU

WANG, YUANFENG

VIA ALLIANCE SEMICONDUCTOR CO., LTD.

38819/230

17-Apr-2018

(X0) 1: PATTERN DETECTOR FOR DETECTING HANGS

(A1) 2: PATTERN DETECTOR FOR DETECTING HANGS

(B2) 9: PATTERN DETECTOR FOR DETECTING HANGS

HOOKER, RODNEY E.

REED, DOUGLAS R.

VIA ALLIANCE SEMICONDUCTOR CO., LTD

37041/696

17-Apr-2018

(X0) 1: LEVEL-SHIFT CIRCUITS COMPATIBLE WITH MULTIPLE SUPPLY VOLTAGE

(A1) 2: LEVEL-SHIFT CIRCUITS COMPATIBLE WITH MULTIPLE SUPPLY VOLTAGE

(B2) 9: LEVEL-SHIFT CIRCUITS COMPATIBLE WITH MULTIPLE SUPPLY VOLTAGE

SI, QIANG

LIU, CHENG

VIA ALLIANCE SEMICONDUCTOR CO., LTD.

38448/514

12-Apr-2018

(X0) 1: BRANCH PREDICTOR THAT USES MULTIPLE BYTE OFFSETS IN HASH OF INSTRUCTION BLOCK FETCH ADDRESS AND BRANCH PATTERN TO GENERATE CONDITIONAL BRANCH PREDICTOR INDEXES

(A1) 2: BRANCH PREDICTOR THAT USES MULTIPLE BYTE OFFSETS IN HASH OF INSTRUCTION BLOCK FETCH ADDRESS AND BRANCH PATTERN TO GENERATE CONDITIONAL BRANCH PREDICTOR INDEXES

WANG, XIAOLING

YANG, MENGCHEN

CHEN, GUOHUA

VIA ALLIANCE SEMICONDUCTOR CO., LTD.

40122/163

05-Apr-2018

(X0) 1: PIPELINED PROCESSOR WITH MULTI-ISSUE MICROCODE UNIT HAVING LOCAL BRANCH DECODER

(A1) 2: PIPELINED PROCESSOR WITH MULTI-ISSUE MICROCODE UNIT HAVING LOCAL BRANCH DECODER

BAI, LONGFEI

HUANG, ZHENHUA

YAN, MENGMENG

VIA ALLIANCE SEMICONDUCTOR CO., LTD.

40104/43